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Preliminary
01.08.28
Features * -5 V single power supply * 20 dB typical gain * 2.0 GHz typical -3 dB cutoff frequency * On-chip matching to 50 * 55 mA typical operating current * Low-cost 20-lead QFP package * Differential input and output * Differential ECL compatible input Applications
F0321818Q
2 GHz Bandwidth
Limiting Amplifier
* Post-amplifier of an optical receiver circuit up to 2.5 Gbps * Logic gate buffer to interface between analog circuit and logic circuit
Functional Decription The F0321818Q is a stable GaAs integrated limiting amplifier for use in a post-amplifier of an optical receiver circuit up to 2.5 Gbps. The F0321818Q typically specifies a small signal gain of 20 dB (Rs=RL=50 ) with a 3 dB-cutoff-frequency of 2.0 GHz. It features single +5 V supply operation, excellent VSWR's of 1.1:1, and a typical dissipation current of 55 mA. The F0321818Q can be also used as interface circuits in sensing systems and measurement instruments. Emitter coupled logic (ECL) or source coupled FET logic (SCFL) circuits are the most popular IC's for high speed digital circuits; the F0321818Q operating under a differential ECL compatible input condition is the best choice as the interface IC to join analog circuits to ECL circuits or conventional GaAs logic IC's.
F0321818Q
Absolute Maximum Ratings
2GHz Limiting Amplifier
Ta=25 C, unless specified
Parameter Supply Voltage Supply Current Input Voltage Swing (AC) Output Voltage Ambient Operating Temperature Strage Temperature Symbol V SS IDD V IN+ , V INV OUT+ , V OUTTa Tstg Value V DD-7 to VDD +0.5 80 1 V SS-2.5 to VSS 0 to +70 -55 to +125 Unit V mA V V C C
Recommended Operating Conditions VDD = GND
Value Parameter Supply Voltage AC Coupled Load Ambient Operating Temperature Symbol Min. V SS RL Ta -5.46 0 Typ. -5 50 25 Max. -4.75 70 V C Unit
Electrical Characteristics Ta = 25 C, VDD = 0 V, VSS = -5V, unless specified
Value Parameter Supply Current Input Bias Point Output Bias Point VSWR (IN,OUT) Gain -3dB High Frequency Cutoff Maximum Output Swing (single output) Symbol V DD VIN V OUT SWR GV Fc Vom Pin=-40dBm f=1NHz Pin=-40dBm RL-50 f=1NHz Pin=-40dBm RL-50 RL-50 0.4 Test Conditions Min. Pin=-40dBm 18 Typ. 55 -3.5 -1.5 1.1 20 2.0 0.6 Max. 70 1.8 0.8 mA V V dB GHz V Unit
2GHz Limiting Amplifier
Block Diagram
VDD
F0321818Q
LPF+
VIN+ Amp. VINAmp. Output Buffer
VOUT+ VOUT-
LPF-
VSS
Pin Assignments(Top View)
Pin Descriptions
1 2 V DD V DD V OUT V OUT V DD V DD V SS V SS V SS V SS LPF+ LPF+ V INV IN+ LPFLPFV SS V SS V SS NC Supply Voltage Supply Voltage Output Output Supply Voltage Supply Voltage Supply Voltage Supply Voltage Supply Voltage Supply Voltage LPF - AC - GND LPF - AC - GND Input Input LPF AC - GND LPF + AC - GND Supply Voltage Supply Voltage Supply Voltage No Connection
16
15
14
13
12
11
3 4
17 18
10 9
5 6 7 8 9 10 11 12
19 20
No.1 LEAD IDENTIFIER
8 7
13 14 15 16
1
2
3
4
5
6
17 18 19 20
* Other pins are VDD
F0321818Q
Test Circuits
2GHz Limiting Amplifier
1)AC Characteristics
0.1F 50 LPFVINVIN+ LPF+ 0.1F VSS VOUTVOUT+ VDD 0.1 F VDD Pin =-40dBm 50 Vector Network Analyzer 50 2200 pF 50
*
F0321818Q
*
2)Limiting Characteristcs
0.1F 50 LPFVINVIN+ LPF+ 0.1F VDD Pulse Pattern Generator Sampling CLOCK Oscilloscope 50 VSS VOUTVOUT+ VDD 0.1 F 2200 pF 50
* *
F0321818Q
* *
Attenuator
DATA
* DC BLOCK(PICOSECIND PULSE LABS, MODEL 5501)
2GHz Limiting Amplifier
Typical AC Characteristics (1) Gain
F0321818Q
Ta =25 C, VDD =+5 V, VSS =GND, Pin =-40 dBm, RL =50 ,300 kHz-3 GHz
(dB) 27
18
9
0 1M 10M 100M Frequency(Hz) 1G
(2) Depemdence of Gain and High Frequency Cutoff on Power Supply Variations Ta =25 C, VDD =-5 V, VSS =GND, Pin =-40 dBm, RL =50 ,300 kHz-3 GHz Gain(dB)
23 2.20 2.18 2.16 21 2.14 20 2.12 2.10 4.5
High Frequency Cut-off(GHz)
22
19 4.5
5.0 VDD(V)
5.5
5.0 VDD(V)
5.5
F0321818Q
Typical AC Characteristics (3) VSWR's
2GHz Limiting Amplifier
Ta =25 C, VDD =+5 V, VSS =GND, Pin =-40 dBm, RL =50 , 300 kHz - 3 GHz
6 5 4 3 2 1
[at VIN+]
6 5 4 3 2 1
[at VOUT+]
1M
10M
100M
1G
1M
10M
100M
1G
Frequency(Hz)
*Almost same characteristics is exhibited at VIN-
Frequency(Hz)
*Almost same characteristics is exhibited at VOUT-
(4) S parameters on Smith Chart Ta =25 C, VDD =+5 V, VSS =GND, Pin =-40 dBm, RL =50 S11 at VIN+ S22 at VOUT+
START 100MHz
STOP 3GHz
START 100MHz
STOP 3GHz
2GHz Limiting Amplifier
Typical Limiting Characteristics
F0321818Q
(1) Eye diagrams for 2.5Gbps NRZ Pseudo-random Data Responce 223-1, Ta = 25 C, VDD =5 V, VSS =GND, RL =50 (a) VIN+ = 5mVp-p
10mV/div
100psec/div (b) VIN+ = 50mVp-p
100mV/div
100psec/div (c) VIN+ = 500mVp-p
100mV/div
100psec/div
F0321818Q
(2) Output amplitude vs Input amplitude
2GHz Limiting Amplifier
f=2 GHz, PRBS=223-1 ,RL=50
Ta=85[C] 800 700 600 Vdd=4.5[V]
Vout [mVp-p] Vout [mVp-p]
Ta=50[C] 800 700 Vdd=5.0[V] 600 Vdd=4.5[V] 500 400 300 200 100 Vdd=5.0[V] Vdd=5.5[V]
Vdd=5.5[V]
500 400 300 200 100 0 0 100 200 300 400 500 Vin[mVp-p]
0
0
100
200
300
400
500
Vin[mVp-p]
Ta=25[C] 800 700 600
Vout [mVp-p]
Ta=0[C] 800 700 Vdd=5.0[V] 600
Vout [mVp-p]
Vdd=5.5[V]
Vdd=5.5[V] Vdd=5.0[V] Vdd=4.5[V]
500 400 300 200 100 0 0 100 200
Vdd=4.5[V] 500 400 300 200 100 300 400 500 0 0 100
200
300
400
500
Vin[mVp-p]
Vin[mVp-p]
2GHz Limiting Amplifier
General Discription
F0321818Q
A post-amplifier is positioned between a pre-amplifier (an amplifier for a faint photocurrent from PIN photo diode) and a decision circuit (a circuit to discriminate the logic level of the received signal) , enlarging the output signal from the pre-amplifier to a higher level to discriminate the logic level. The input signal amplitude of the post-amplifier, meaning the output signal of the pre-amplifier, varies widely, because the optical signal power received by the PIN photo diode depends on the length of the transmission line. Therefore, the postamplifier should function to output an almost constant signal level under widely varying input voltage. This is called a limiting function, and the F0321818Q provides excellent limiting characteristics. As shown in the data sheet, the increase of only 200 mV (400 mV600 mV) in the output voltage can be observed even if the 2.5 Gps input signal varies widely from 50 mV to 500 mV. Wide use analog IC's having satisfactory limiting functions as described above can not be found except for the F0321818Q. Customized IC's for each application or a circuit designed by discrete transistors are believed to have been developed. Port Matching Input/output VSWR's of the F0321818Q are well-designed for 50 , typically showing excellent VSWR's of 1.1:1. Therefore, the F0321818Q can be applied for 50 systems with no external parts. Furthermore, the fine VSWR characteristics provide stable operation even for cascade connections of two IC's for a higher gain. The excellent VSWR characteristics of the F0321818Q gives full play in a clock recovery system using SAW filters, because the impedance mismatch has a significant effect on the quality of the recovered clock signal. Gain Consideration The F0321818Q has a small signal gain of 20 dB. A too high gain can be harmful because of parasitic oscillation. If a slightly higher gain is needed, a 6 dB higher gain of 26 dB can be obtained by a high impedance termination instead of a 50 load. A double gain can be achieved by simple cascade connection if a still higher gain is required.
F0321818Q
Noise Performance
2GHz Limiting Amplifier
The F0321818Q based on the GaAs FET fabrication process intrinsically has more excellent low-noise characteristics compared with IC's based on the silicon bipolar process. Many transmission systems often demand superior signal-to-noise ratio; the F0321818Q is the best choice for such applications. The differential circuit configuration in the input and output enable a complete differential operation to reduce common mode noise: simple single ended input and output operation is also available. LPF+ & LPFThe F0321818Q has two terminals, LPF+ and LPF-, for AC ground. These terminals are connected to ground by a capacitor. The time constant of the feedback loop in the F0321818Q depends on the capacitor, giving the lower frequency cutoff of the circuit by the large capacitor. A 0.1micro farad is employed for conventional applications. Packaging The F0321818Q is in an 20-lead quadruplel flat package (QFP) about 350 mil square with the lead pitch of 32 mil, achieving miniaturization and low cost. It is originally developed by SEI to improve RF performance and heat radiation. Comparing with the SOP, the ground potential steadier at microwave frequency range and the thermal receptivity is smaller due to the metal based bottom structure made from Cu with a high thermal conductivity. The intrinsic broad band performance of the F0321818Q can not be brought out by the standard SOP and LCC, because it is difficult to overcome impedance mismatch at high frequency around 2 GHz. Therefore, SEI's superior package technology enable to achieve the excellent wide band limiting performance of the F0321818Q. Precautions Owing to their small dimensions, the GaAs FET's from which the F0321818M is designed are easily damaged or destroyed if subjected to large transient voltages. Such transients can be generated by power supplies when switched on if not properly decoupled. It is also possible to induce spikes from static-electricity-charged operations or ungrounded equipment.
2GHz Limiting Amplifier
Package Drawings
F0321818Q
0.7 typ.
7.00.2 0.7 typ.
7.00.2 9.00.3
All Dimensions shown in millimeters
0.100.05
0.8
0.30.1
1.450.1
Electron Device Department
0.50.2
No.1 LEAD IDENTIFIER
9.00.3

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